1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit, and more particularly, to a fuse circuit for a semiconductor integrated circuit and a control method thereof.
2. Related Art
In general, a semiconductor integrated circuit is subjected to various tests for evaluating operational reliability. The tests include operational tests for monitoring the input/output and operational state of the semiconductor integrated circuit according to external command signals. In addition, physical testing of the semiconductor integrated circuit is performed for monitoring the ability to adapt to changes in physical environments regardless of command signal execution.
A highly accelerated temperature and humidity stress test (HAST) is one of the physical tests and evaluates operational reliability in high temperature and humidity environments of the semiconductor integrated circuit. For example, the temperature and humidity stress tests create high temperature and humidity environments with a humidity of about 80% to 90% and a temperature of 125° C. to accelerate moisture penetration through a package joint part while supply voltages VDD and VSS to the semiconductor integrated circuit.
Many semiconductor integrated circuits include significant numbers of fuse sets for changing test or operational conditions during a manufacturing process of the semiconductor integrated circuit.
FIG. 1 is a schematic block diagram of conventional fuse sets. In FIG. 1, a plurality of fuse sets 10 are reset according to a power-up signal ‘PWRUP’ and perform a normal signal output according to whether a fuse is cut when an electric power is supplied after the reset is performed. Here, the fuse may be formed of metal or non-metal material(s). However, characteristics of a metal material can greatly effect the resistance of the metal due to chemical reactions, such as an ionization phenomenon, in high temperature and humidity environmental conditions, as in the temperature and humidity stress test. Since the fuse is formed of a metal, an increase in resistance may result from the chemical reactions when the temperature and humidity stress test is performed. Accordingly, normal operation of the fuse may be adversely effected.
The power-up signal ‘PWRUP’ is activated when the voltage VDD exceeds a predetermined level, wherein the fuse set operates according to the power-up signal ‘PWRUP’. Accordingly, the power-up signal ‘PWRUP’ is activated as the voltage VDD is supplied when the temperature and humidity stress test is performed, whereby the voltage VDD is supplied to the metal fuse of the fuse set 10.
As a result, when the fuse of the fuse set 10 is connected while the temperature and humidity stress test is performed, the resistance of the fuse may abnormally increase, thereby causing a current leakage path and problems, such as a fault of a current standard (IDDP2), for a semiconductor integrated circuit. Since a plurality of the fuse sets is provided inside a semiconductor integrated circuit, the current standard (IDDP2) fault problem becomes more critical.